David Burnette

David Burnette is currently Director of Engineering for the Catapult High-Level Synthesis product of Mentor, a Siemens Business. He has contributed to the HLS program over the last 26 years, starting first with behavioral synthesis from VHDL followed by C++/SystemC. Much of his recent work has centered around High-Level Verification (designing infrastructure for comparing the untimed C++ against the timed RTL) and the development of class-based C++ HLS IP for math, DSP/Image Processing and Machine Learning. He received his BSEE and MSEE from Virginia Tech and holds 4 patents in the area of HLS methodologies.